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SimplePipe: a simulation tool for task allocation and design of processor pipelines with application to network processors

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2 Author(s)
Franklin, M.A. ; Dept. of Comput. Sci. & Eng., Washington Univ., St. Louis, MO, USA ; Joshi, V.

SimplePipe is a simulation framework/tool based on SimpleScalar (Austin, T. et al., IEEE Computer, 2002; SimplePipe analyzes the performance effects of alternative task allocations in systems of multiple pipelines where pipeline stages are either processors or dedicated hardware functions. Tasks are defined in terms of sequences of separate C program executions with each sequence representing the functional requirements of a flow. Performance effects associated with alternative assignment of shared memory modules to the pipeline stage can also be explored. SimplePipe was motivated by the performance requirements of network processors (NPs) that are configurable into multiple processor pipelines. The assignment of communication flow tasks to pipeline stages, selection of the number of stages, determination of processor cache sizes and the assignment of shared memory modules are important design decisions impacting performance. An assignment study illustrating SimplePipe capabilities is presented.

Published in:

Modeling, Analysis, and Simulation of Computer and Telecommunications Systems, 2004. (MASCOTS 2004). Proceedings. The IEEE Computer Society's 12th Annual International Symposium on

Date of Conference:

4-8 Oct. 2004