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An optimized ternary CAM concept is introduced for application in the longest prefix matching tasks of the Internet search engines. It employs w+1 RAM bits for a word of size w. A conventional TCAM needs 2w RAM bits for the same word size. Based on this concept an 8 bit prefix-CAM cluster is designed out of 9 SRAM bits, four of which merge to store a 32-bit IPv4 prefix. A complete prefix-CAM module employs 22% less transistors than a conventional TCAM, for equal storage size and equal functionality. We confirm the 22% area saving by implementing the layouts for prefix-CAM and TCAM words. Our design also reduces interconnect area by reducing address decode lines.