Cart (Loading....) | Create Account
Close category search window
 

Self-align recessed source drain ultrathin body SOI MOSFET

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Zhang, Z. ; Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China ; Shengdong Zhang ; Chan, M.

In this letter, a self-aligned recessed source/drain (ReS/D) ultrathin body (UTB) silicon-on-insulator (SOI) MOS technology is proposed and demonstrated. The thick diffusion regions of ReS/D are placed on a recessed trench, which is patterned on the buried oxide and go under the SOI film. The new structure reduces the parasitic S/D resistance without increasing the gate-to-drain Miller capacitance, which is the major advantage over the elevated S/D structure. Fabrication details and experimental results are presented. The scalability of the UTB MOSFETs and the larger design window due to reduced parasitics are demonstrated.

Published in:

Electron Device Letters, IEEE  (Volume:25 ,  Issue: 11 )

Date of Publication:

Nov. 2004

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.