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An 8Mb demonstrator for high-density 1.8V Phase-Change Memories

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13 Author(s)
Bedeschi, F. ; MPG & Central R&D, STMicroelectronics, Agrate Brianza, Italy ; Resta, C. ; Khouri, O. ; Buda, E.
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An 8Mb Non-Volatile Memory Demonstrator incorporating a novel 0.32 μm2 Phase-Change Memory (PCM) cell using a Bipolar Junction Transistor (BJT) as selector and integrated into a 3V 0.18 μm CMOS technology is presented. Realistically large 4Mb tiles with a voltage regulation scheme that allows fast bitline precharge and sense are proposed. An innovative approach that minimizes the array leakage has been used to verify the feasibility of high-density PCM memories with improved Read/Write performance compared to Flash. Finally, cells distributions and first endurance measurements demonstrate the chip functionality and a good working window.

Published in:

VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on

Date of Conference:

17-19 June 2004