Skip to Main Content
This analog baseband transceiver features a 12-bit, 180MSPS pipelined ADC with -71dBFS THD and 61dB SNR sharing substrate with dual I/Q 10-bit 180MSPS D/A converters and low-jitter DLL/digital buffers. Fabricated in the IBM BiCMOS6HP process and packaged in a low-inductance 6-layer flip-chip, the ADC consumes a total of 1.2W at 3.3V. The converter utilizes 1.5b/stage switched-capacitor stages with a wide-band, high-gain opamp employing 2.5V bipolar devices, a dedicated track/hold amplifier, and a voltage reference without an amplifier.
Date of Conference: 17-19 June 2004