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An area-efficient implementation of digital-IF QAM coherent demodulator for software-defined radio receivers

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3 Author(s)
Yongchul Song ; Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea ; Jeongpyo Kim ; Beomsup Kim

This paper presents a digital-IF QAM coherent demodulator implemented on 0.11-mm2 die area. Two independent resampling circuits with second-order digital tracking loops are employed in order to achieve both the carrier and timing recoveries. A coherent demodulator with complete digital synchronization functions achieves a bit-error rate of 10-6 with an implementation loss of 0.6 dB for uncoded 16-QAM signal. It consumes 16 mW with a 1.8-V supply, working in 80 MHz.

Published in:

VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on

Date of Conference:

17-19 June 2004