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The revolutionary and truly 3-dimensional 25F2 SRAM technology with the smallest S3 ( stacked single-crystal Si) cell, 0.16um2, and SSTFT (atacked single-crystal thin film transistor) for ultra high density SRAM

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11 Author(s)
Soon-Moon Jung ; R&D Center, Samsung Electron., Kyunggi-Do, South Korea ; Jaehoon Jang ; Wonseok Cho ; Jaehwan Moon
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The smallest 25F2 SRAM cell size of 0.16um2 is realized by S3 cell technology and SSTFT with 193nm ArF lithography process. The stacked single-crystal thin film is developed and used for the first time in the SRAM cell to make the SRAM products comparative to the DRAM products in the density and the cost. The load PMOS and pass NMOS transistors are stacked over the planar pull-down NMOS transistors to drastically reduce the cell size. In this study, the dream of truly 3D memory device is achieved by fabricating 64M bit density SRAM.

Published in:

VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on

Date of Conference:

15-17 June 2004