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Reducing the cost of branches by using registers

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2 Author(s)
Davidson, J.W. ; Dept. of Comput. Sci., Virginia Univ., Charlottesville, VA, USA ; Whalley, D.B.

In an attempt to reduce the number of operand memory references, many RISC (reduced-instruction-set-computer) machines have 32 or more general-purpose registers (e.g. MIPS, ARM, Spectrum, 88 K). Without special compiler optimizations, such as inlining or interprocedural register allocation, it is rare that a computer will use a majority of these registers for a function. The authors explore the possibility of using some of these registers to hold branch target addresses and the corresponding instruction at each branch target. To evaluate the effectiveness of this scheme, two machines were designed and emulated. One machine had 32 general-purpose registers used for data references, while the other machine had 16 data registers and 16 registers used for branching. The results show that using registers for branching can effectively reduce the cost of transfers of control

Published in:

Computer Architecture, 1990. Proceedings., 17th Annual International Symposium on

Date of Conference:

28-31 May 1990