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A hybrid three-stage packet switch architecture is described which exploits the strength of electronic memory and photonics communication technologies. The architecture and method have been verified by simulation using a self-similar traffic model based on aggregation of Pareto-distributed "ON-OFF" processes, which was tested to corroborate its self-similarity by measuring its Hurst parameter. The performance of the switch is compared to the ideal output queued switch (OQS) architecture and to a switch with the same architecture, but with a static configuration. Our results show that this architecture and method result in a dramatic reduction of complexity, at the price of only a modest spatial speedup, which is easy to provide with photonic technology.