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A family of carrier lock detectors for M-PSK receivers operating in additive white Gaussian noise channels is suggested. The statistical properties of the lock detectors are derived theoretically using stochastic analysis, and computer simulations are used to validate the results obtained. The derivations yield discovery of two useful attributes of the lock detectors: 1) they are self-normalizing (or in other words signal-level independent) and 2) the channel ES/N0 can be readily ascertained from the lock metric when the receiver is in lock. Furthermore, a particularly simple hardware implementation for the lock metric computation process is found, which allows easy and efficient implementation of its computation within a field programmable gate array (FPGA) or application specified integrated circuit (ASIC). Analysis of the lock detectors' behavior under imperfect locking conditions is also discussed, and simulation results are presented. An overview is given of the applicability of the lock detectors to several related digital phase modulation schemes.