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FINE: a multicast scheduling algorithm for high-speed ATM switches

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4 Author(s)
Gamvrili, M. ; Dept. of Electr. & Comput. Eng., Patras Univ., Greece ; Papazaharias, N. ; Chondropoulos, K. ; Serpanos, D.N.

High-speed ATM switches mostly implement the memory architecture of advanced input queuing for unicast traffic. When handling multicast traffic this is infeasible due to the high cost it inserts. A set of multicast scheduling algorithms implementing input queuing has been proposed in the past. In this paper we present a new multicast scheduling algorithm, FINE, that maintains multiple queues for incoming packets in an M × N switch, a total of 2N - 1 queues. FINE provides improved characteristics over alternatives as to the throughput it achieves and the fairness it ensures. In addition, it presents suppleness in keeping with the system's properties and its applications features.

Published in:

Signal Processing and Information Technology, 2003. ISSPIT 2003. Proceedings of the 3rd IEEE International Symposium on

Date of Conference:

14-17 Dec. 2003