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Personal electronics devices are miniaturized to be more comfortable to carry. This size reduction desire, together with increased functionality, have become drivers, especially for wireless devices. Mobile terminal electronics have set a challenge for packaging and provided the motivation to verify emerging technologies. Chip scale packages (CSP), flip-chip, and passive integration technologies have been verified by building two technology verifiers, both GSM mobile terminals based on the electronics of existing products. High-density PWB (HDPWB) technologies were selected to provide the required routing density for flip-chip assembly. These electronics modules were assembled into the mechanics of existing mobile terminals, facilitating full electrical characterization. The digital part of the mobile terminal is characterized by large ICs including memories, data processors, and many discrete components with equal values for interfacing, filtering, and timing. The principle aims in packaging the digital part were to reduce the number of discrete passives by the use of silicon based flip-chip integrated passive devices (IPD) and to eliminate single-chip packaging, where appropriate. The most significant improvement in the density of the digital part was achieved with the use of CSPs in Verifier 1 and flip-chip integrated circuits (ICs) and IPDs in Verifier 2, both requiring HDPWBs. Existing IC designs were converted from wire bonded to flip-chip for the Verifier 2. An area reduction approaching 50%, together with significant component and solder joint count reduction was achieved. The radio part is characterized by a few, small ICs and many disparate discrete components used for filtering, matching, timing, etc. The approach used in repackaging the radio part must be different to the digital part case, primarily because any small change to the signal paths can have dramatic effects on the operation of the radio circuits. The most significant radio part achievements were the creation and verification of the MCM-D/Si module in Verifier 1, the conversion to flip-chip of the RFIC in Verifier 2 and the use of IPDs. The areas occupied by the radio part components were reduced, as was the component count and the number of solder joints.