Skip to Main Content
A monolithic transmitter architecture that addresses difficulties in data retiming at high bit rates has been designed and fabricated. It utilises a quarter-frequency multiplexing scheme, a fully symmetric multiplexer and a feedforward interpolated ring voltage controlled oscillator (VCO), to transmit data in excess of 20 Gbit/s. The symmetric multiplexer has full input and output symmetry designed to have the same delay from any input to the output. Each stage in the VCO controls its delay by linearly interpolating the signals from the previous two stages, yielding a VCO tuning range of 3.7 to 5.5 GHz with a phase noise of -90.2 dBc/Hz at 1 MHz. SiGe heterojunction bipolar technology (HBT) technology with an fT of 50 GHz was used in this design.
Date of Publication: 12 Aug. 2004