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A global bus power optimization methodology for physical design of memory dominated systems by coupling bus segmentation and activity driven block placement

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4 Author(s)
Hua Wang ; IMEC ; Papanikolaou, A. ; Miranda, M. ; Catthoor, F.

First Page of the Article

Published in:
Design Automation Conference, 2004. Proceedings of the ASP-DAC 2004. Asia and South Pacific

Date of Conference: 27-30 Jan. 2004

Page(s):
759 - 761
Print ISBN:
0-7803-8175-0
Digital Object Identifier :
10.1109/ASPDAC.2004.1337695
Product Type:
Conference Publications

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