By Topic

SCR device with dynamic holding voltage for on-chip ESD protection in a 0.25-μm fully salicided CMOS process

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Ming-Dou Ker ; Nanoelectronics & Gigascale Syst. Lab., Nat. Chiao-Tung Univ., Hsinchu, Taiwan ; Zi-Ping Chen

A dynamic-holding-voltage silicon-controlled rectifier (DHVSCR) device is proposed and verified in a 0.25-μm/2.5-V salicided CMOS process. In the DHVSCR device structure, the control nMOS and pMOS transistors are directly embedded in SCR device structure. The proposed DHVSCR device has the characteristics of tunable holding voltage and holding current by changing the gate voltage of embedded nMOS and pMOS. Under normal circuit operating condition, the DHVSCR has a holding voltage higher than the supply voltage without causing a latch-up issue. Under an electrostatic discharge (ESD) stress condition, the DHVSCR has a lower holding voltage to effectively clamp the overshooting ESD voltage. From the experimental results, the DHVSCR with a device width of 50 μm can sustain a human-body-model ESD level of 5.6 kV.

Published in:

Electron Devices, IEEE Transactions on  (Volume:51 ,  Issue: 10 )