In this paper, we describe a self-aligned process to produce short-channel vertical power DMOSFETs in 4H-SiC. By reducing the channel length to ≤0.5 μm, the specific on-resistance of the MOSFET channel is proportionally reduced, significantly enhancing performance.
Published in:
Electron Devices, IEEE Transactions on
(Volume:51
,
Issue:
10
)
Date of Publication: Oct. 2004