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A self-aligned process for high-voltage, short-channel vertical DMOSFETs in 4H-SiC

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3 Author(s)
Matin, M. ; Birck Nanotechnology Center, Purdue Univ., West Lafayette, IN, USA ; Saha, A. ; Cooper, J.A., Jr.

In this paper, we describe a self-aligned process to produce short-channel vertical power DMOSFETs in 4H-SiC. By reducing the channel length to ≤0.5 μm, the specific on-resistance of the MOSFET channel is proportionally reduced, significantly enhancing performance.

Published in:

Electron Devices, IEEE Transactions on  (Volume:51 ,  Issue: 10 )