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Impact of downscaling on high-frequency noise performance of bulk and SOI MOSFETs

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7 Author(s)
Pailloncy, G. ; Inst. d''Electronique, de Microelectronique et de Nanotechnologie, Villeneuve d''Ascq, France ; Raynaud, C. ; Vanmackelberg, M. ; Danneville, F.
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Parameters limiting the improvement of high-frequency noise characteristics for deep-submicrometer MOSFETs with the downscaling process of the channel gate length are analyzed experimentally and analytically. It is demonstrated that the intrinsic Pucel's noise P, R, and C parameters are not strongly modified by the device scaling. The limitation of the noise performance versus the downscaling process is mainly related to the frequency performance (fmax) of the device. It is demonstrated that for MOSFETs with optimized source, drain, and gate accesses, the degradation of the maximum oscillation frequency is mainly related to the increase of the parasitic feedback gate-to-drain capacitance and output conductance with the physical channel length reduction. Optimization of these internal parameters is needed to further improve the high-frequency noise performance of ultra deep-submicrometer MOSFETs.

Published in:

Electron Devices, IEEE Transactions on  (Volume:51 ,  Issue: 10 )

Date of Publication:

Oct. 2004

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