Referenced Items are not available for this document.
The performance of low-to-medium voltage power devices (7 V-30 V) implemented in an advanced 0.25 μm BiCMOS-DMOS process is presented. The devices were optimized for a range of applications in this voltage group. In particular, the lateral DMOS devices have a capability of operating with the drain fully isolated from the substrate. The Rsp-BVdss performance for these devices is shown to be very competitive with respect to similar technologies. This performance is achieved without sacrificing the requirements for square electrical and lifetime safe operating area (SOA).
Published in:
Power Semiconductor Devices and ICs, 2004. Proceedings. ISPSD '04. The 16th International Symposium on
Date of Conference: 24-27 May 2004
- Page(s):
- 419 - 422
- Print ISBN:
- 4-88686-060-5
- INSPEC Accession Number:
- 8009091
- Digital Object Identifier :
- 10.1109/ISPSD.2004.1332964
- Product Type:
- Conference Publications
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