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A 3.2 to 4 GHz, 0.25 μm CMOS frequency synthesizer for IEEE 802.11a/b/g WLAN

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4 Author(s)
Terrovitis, M. ; Atheros Commun., Sunnyvale, CA, USA ; Mack, M. ; Singh, K. ; Zargari, M.

A fully integrated 3.2 to 4 GHz frequency synthesizer, part of an IEEE 802.11a/b/g transceiver, is implemented in a 0.25 μm standard CMOS technology. The phase noise is -105 dBc/Hz at 10 kHz offset, and the spurs are below -64 dBc when measured at the 5 GHz transmitter output. The settling time is less than 150 μs.

Published in:

Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International

Date of Conference:

15-19 Feb. 2004