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Design space exploration for real-time embedded stream processors

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3 Author(s)

We explore tradeoffs between organization and number of ALUs and clock frequency in a stream processor. The tool provides candidate low-power configurations and estimates of their real-time performance. The tool relates instruction-level, subword, and data parallelism to functional units' organization and utilization. The exploration methodology is applicable to all embedded-processor designs in signal and media processing.

Published in:

Micro, IEEE  (Volume:24 ,  Issue: 4 )