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Dynamic power optimization of the trace-back process for the Viterbi algorithm

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7 Author(s)
Petrov, M. ; Inst. of Microelectron. Syst., TU, Darmstadt, Germany ; Murgan, T. ; Obeid, A. ; Chitu, C.
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This paper presents an architecture for the trace-back unit of a Viterbi decoder, whose decoding window length can be adjusted dynamically during runtime, allowing power to be saved by turning off the unused stages. Power savings of up to 62% are reported, using two different technology libraries to validate the results. An algorithm is also provided, which determines the optimum value for the trace-back window length that ensures a target BER of the decoded stream, for an estimated quality of the communication channel.

Published in:

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on  (Volume:2 )

Date of Conference:

23-26 May 2004