This paper presents an area- and power-efficient quadrature direct digital frequency synthesis technique called fine-grain angle rotation. To reduce the large bit-width requirement of the angle rotation, multiple start points are introduced and the angle rotation is applied to the small angle remained. A prototype chip occupies 0.16 mm2 in 0.25 μm 1P5M CMOS technology and consumes 90 mW at 400 MHz clock frequency, which is significantly improved performance compared to the previous state-of-the-art chips.
Published in:
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
(Volume:2
)
Date of Conference: 23-26 May 2004