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An efficient architecture for color space conversion using Distributed Arithmetic

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3 Author(s)
F. Bensaali ; Sch. of Comput. Sci., Queen's Univ., Belfast, UK ; A. Amira ; A. Bouridane

The convergence of computers, the Internet and a wide variety of video devices, all using different color representations, is forcing the digital designers today to convert between them. The objective is to have a common color space that all inputs are converted to before algorithms and processes are executed. This paper presents a novel architecture for efficient implementation of a color space conversion suitable for Field Programmable Gate Array (FPGAs) and VLSI. The proposed architecture is based on Distributed Arithmetic (DA) ROM accumulator principles. In addition, it is fully pipelined, platform independent, has a low latency (8 cycles) and a high throughput rate.

Published in:

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on  (Volume:2 )

Date of Conference:

23-26 May 2004