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A novel 256×256 CMOS active pixel sensor (APS) system with 12 bit, 6.3 Msample/s (MS/s) CMOS pipelined analog to digital converter (ADC) integrated on chip is presented. The test chip has been implemented in 0.35 μm 2P4M process, operated by a 3.3 V supply and is expected to dissipate 55 mW. The total area of the prototype is 12 mm2, and the core area of ADC is 18% from the total area. System architecture and operation are discussed and simulation results are presented.