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A high speed centroid computation circuit in analog VLSI

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3 Author(s)
Bashyam, A. ; Klipsch Sch. of Electr. & Comput. Eng., New Mexico State Univ., Las Cruces, NM, USA ; Furth, P.M. ; Giles, M.K.

We present a new centroid computation circuit with very low dc offset and high bandwidth. A novel test setup is also shown to test adaptive optic integrated circuits. Static and dynamic simulation and test results of the centroid computation circuit are shown. Compared to the work of Deweerth we report a 4.3 times increase in the bandwidth in both simulation and test results. The centroid circuit is fabricated in the AMI 0.5 μm CMOS process. A 1D centroid circuit with 7 photodiodes has dimensions equal to 765 μm×90 μm.

Published in:
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on  (Volume:4 )

Date of Conference: 23-26 May 2004

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