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The design of a 14 GHz I/Q ring oscillator in 0.18 μm CMOS

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2 Author(s)
Eken, Y.A. ; Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA ; Uyemura, J.

This paper presents the design of a 14 GHz ring VCO with in-phase/quadrature (I/Q) outputs in a standard 0.18 μm CMOS process. A four stage multiple-pass ring oscillator is coupled with frequency doublers for obtaining high frequencies. The VCO core uses delay stages with cross-coupled FETs to increase the switching speed and to improve the noise parameters. The proposed design has a tuning range of 8.5 to 14 GHz (49%), and exhibits -95.35 dBc/Hz phase noise (@ 1 MHz) at a center frequency of 12.7 GHz while consuming 146 mW from a 1.8 V power supply. The results suggest that it is not always necessary to resort to integrated LC networks for 10+ GHz VCO/CCO modules but that cost and area effective ring designs may suffice.

Published in:

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on  (Volume:4 )

Date of Conference:

23-26 May 2004