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High-speed EBCOT with dual context-modeling coding architecture for JPEG2000

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5 Author(s)
Jen-Shiun Chiang ; Dept. of Electr. Eng., Tamkang Univ., Taipei, Taiwan ; Chun-Hau Chang ; Yu-Sen Lin ; Chang-You Hsieh
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This work presents a parallel context-modeling coding architecture and a matching arithmetic coder (MQ coder) for the embedded block coding (EBCOT) unit of the JPEG2000 encoder. The tier-1 of the EBCOT consumes most of the computation time in a JPEG2000 encoding system, and the proposed parallel architecture can increase the throughput rate of the context-modeling. To match the high throughput rate of the parallel context-modeling architecture, and efficient pipelined architecture for context-based adaptive arithmetic encoder is proposed. This encoder of JPEG2000 can work at 185MHz to encode one symbol each cycle. Compared with the conventional context-modeling architecture, our parallel architecture can decrease the execution time about 25%.

Published in:

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on  (Volume:3 )

Date of Conference:

23-26 May 2004