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Variable block size motion estimation algorithm and its hardware architecture for H.264/AVC

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2 Author(s)
Jae Hun Lee ; Digital Media R&D Center, Samsung Electron. Co., Ltd., South Korea ; Nam Suk Lee

This paper presents a variable block size motion estimation (ME) algorithm and its hardware architectures dedicated to H.264/AVC. Proposed ME architecture can achieve real-time processing for 720×480@30Hz with search range of [-64, +63] in the horizontal and [-32, +31] in the vertical direction at integer-pel accuracy and upto 7 reference frames at the operating frequency of 54MHz.

Published in:

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on  (Volume:3 )

Date of Conference:

23-26 May 2004