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Memory-efficient sum-product decoding of LDPC codes

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2 Author(s)
Sankar, H. ; Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA ; Narayanan, K.R.

Low-density parity-check (LDPC) codes perform very close to capacity for long lengths on several channels. However, the amount of memory (fixed-point numbers that need to be stored) required for implementing the message-passing algorithm increases linearly as the number of edges in the graph increases. In this letter, we propose a decoding algorithm for decoding LDPC codes that reduces the memory requirement at the decoder. The proposed decoding algorithm can be analyzed using density evolution; further, we show how to design good LDPC codes using this. Results show that this algorithm provides almost the same performance as the conventional sum-product decoding of LDPC codes.

Published in:

Communications, IEEE Transactions on  (Volume:52 ,  Issue: 8 )

Date of Publication:

Aug. 2004

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