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A self-restored current-mode CMOS multiple-valued logic design technique and its applications

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2 Author(s)
Teng, D.H.-Y. ; Dept. of Electr. Eng., Saskatchewan Univ., Saskatoon, Sask., Canada ; Bolton, R.J.

This paper presents a multiple-valued logic design technique using self-restored current-mode CMOS (CMCL). The design technique is discussed with two practical circuit examples, including a majority circuit and a tally circuit. The resulting circuits are also compared with their binary equivalents in terms of area.

Published in:

Multiple-Valued Logic, 2004. Proceedings. 34th International Symposium on

Date of Conference:

19-22 May 2004

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