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This paper describes the development of the (embedded operating system), part of RtrASSoc - an adaptable, superscalar, reconfigurable system in a programmable chip (PSOC), to be implemented in a FPGA Virtex from Xilinx. RtrASSoc will be used in embedded applications that need larger capacity, better acting, and dynamic reconfiguration, at a low cost, where the application is who defines the whole structure of the platform RtrASSoc. The resource of dynamic reconfiguration to be used will be the model run-time reconfiguration-Rtr, present in FPGAs Virtex from Xilinx. The function of the embedded operating system will be to manager the units: PSE (embedded superscalar processor), and RR (reconfigurable routines), all belonging to RtrASSoc. RtrASSoc will be used in the recognition of patterns and it will be developed in language VHDL.