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Board level thermal cycle reliability and solder joint fatigue life predictions of multiple stacked die chip scale package configurations

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3 Author(s)
Mitchell, D. ; ChipPAC Inc., Chandler, AZ, USA ; Zahn, B. ; Carson, F.

Stacking die within chip scale packages (CSPs) has become commonplace in the hand held portable electronics industry. Size, weight, and cost are the three primary advantages realized when stacking die within a CSP. What started out as the stacking of two memory dice within the same CSP has exploded into a growth industry of multiple die stack configurations that can sometimes exceed six die and may also include side-by-side die stacking variations within the same package. This increasing complexity and integration of stacked die is not only an assembly engineering challenge, but can also raise board level reliability concerns. Overall package flexibility is decreased with increased die stacking, thus further forcing the solder balls to accommodate the bulk of the plastic strain that is generated during accelerated temperature cycling due to the thermal expansion mismatch between the various materials that encompass the overall CSP structures. This issue is further exacerbated by the fact that increased die stacking, coupled with the unrelenting industry push for product miniaturization, has resulted in increased package solder ball input/output (I/O) count requirements, thus driving decreased solder ball pitches and size diameters. The study evaluates the impact on board level solder joint fatigue reliability during accelerated temperature cycling of one, two, three, four, and even five die stacking within the same CSP form factor. Three different CSP form factors are studied which contain the aforementioned 1-to-5 die stack configurations: (1) 8×11 mm 66-ball 0.80 mm pitch; (2) 15×15 mm 208-ball 0.80 mm pitch; and, (3) 13×13 341-ball 0.50 mm pitch. Furthermore, varying mold compound thicknesses, substrate core thicknesses, ball diameters, and die attach materials are investigated to evaluate their impact on solder joint reliability when incorporating the 1-to-5 die stack configurations. Test data is presented, including resulting Weibull analyses indicating 1st failure, mean failure free life (i.e. 50% population failure), and characteristic life (i.e. 63.2% population failure). An advanced three-dimensional finite element analysis methodology is also applied in an effort to improve solder joint fatigue life pred- iction coefficients. Both time-dependent plasticity (i.e. creep) and time-independent plasticity are accounted for in the finite element simulation methodology. Since the total plastic strain (i.e. time-dependent + time-independent) is a dominant parameter that influence solder fatigue, it was used as a basis for evaluation of solder joint fatigue reliability.

Published in:

Electronic Components and Technology Conference, 2004. Proceedings. 54th  (Volume:1 )

Date of Conference:

1-4 June 2004

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