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A second-order multibit bandpass ΣΔ modulator (BPΣΔM) used for the digitizing of AM/FM radio broadcasting signals at a 10.7-MHz IF is presented. The BPΣΔM is realized with switched-capacitor (SC) techniques and operates with a sampling frequency of 37.05 MHz. The input impulse current, required by the SC input branch, is minimized by the use of a switched buffer without deteriorating the overall system performance. The accuracy of the in-band noise shaping is ensured with two self-calibrating control systems. In a 0.18-μm CMOS technology, the device die size is 1 mm2 and the power consumption is 88 mW. In production, the BPΣΔM features at least 78-dB dynamic range and 72-dB peak SNR within a 200-kHz bandwidth (FM bandwidth). The intermodulation (IMD) is -65 dBc for two tones at -11 dBFS. The robustness of the aforementioned performance is demonstrated by the fact that it has been realized with the BPΣΔM embedded in the noisy on-chip environment of a complete mixed-signal FM receiver.