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High-performance ultralow-temperature polycrystalline silicon TFT using sequential lateral solidification

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8 Author(s)
Yong-Hae Kim ; Basic Res. Lab., Electron. & Telecommun. Res. Inst., Daejeon, South Korea ; Sohn, Choong-Yong ; Lim, Jung Wook ; Sun Jin Yun
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This letter presents technologies to fabricate ultralow-temperature (< 150 °C) polycrystalline silicon thin-film transistor (ULTPS TFT). Sequential lateral solidification is used for crystallization of RF magnetron sputter deposited amorphous silicon films resulting in a high mobility polycrystalline silicon (poly-Si) film. The gate dielectric is composed of plasma oxidation and Al2O3 grown by plasma-enhanced atomic layer deposition. The breakdown field on the poly-Si film was above 6.3 MV/cm. The fabricated ULTPS TFT showed excellent performance with mobility of 114 cm2/V · s (nMOS) and 42 cm2/V · s (pMOS), on/off current ratio of 4.20 × 106 (nMOS) and 5.7 × 105 (pMOS), small Vth of 2.6 V (nMOS) and -3.7 V (pMOS), and swing of 0.73 V/dec (nMOS) and 0.83 V/dec (pMOS).

Published in:

Electron Device Letters, IEEE  (Volume:25 ,  Issue: 8 )

Date of Publication:

Aug. 2004

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