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This paper studies the power control scheme when the multipath channel delays are less than the chip duration. The effects of the channel estimation bias on the system performance are asymptotically evaluated. The bias over evaluates the received signal power and the target quality of service is not reached. To reduce this bias, we present a simple solution which is very easy to implement. The minimum mean square error (MMSE) optimal scheme is also studied. We show that for a given received signal to interference ratio (SIR), the simple solution reaches the optimal bit error rate (BER). Additionally, the optimal scheme allows to reduce the power raise significantly.