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This paper presents the design of multichannel low-noise fast CMOS readout circuits for the counting application of the CZT X-ray detectors by using the Hspice circuit simulator. The noise simulation is performed both in the time and in the frequency domains. One channel of this readout circuit is composed of a preamplifier, a gain amplifier, and a comparator. The noise sources of this readout circuit are modeled in the time domain by using the random numbers and the power spectral densities. The simulated noise voltages at the gain stage output are 19.3 mV rms in the time domain and 21.2 mV rms in the frequency domain. This readout circuit has been fabricated by using the AMI 1.5 μm CMOS process, and the measured noise voltage of the gain stage output is 23.5 mV rms. The charge-to-voltage gain of this readout is 130 mV/fC, and the signal-to-noise ratio is 34.