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High level synthesis methodology from C to FPGA used for a network protocol communication

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4 Author(s)
M. Diaby ; Dept. ASIM 4, Univ. Pierre et Marie Curie, Paris, France ; M. Tuna ; J. L. Desbarbieux ; F. Wajsburt

This paper presents a "Kahn process network" methodology based on the DISYDENT platform (digital system design environment). The system is described by a set of communicating Kahn processes. This processes are C POSIX threads representing both software and hardware tasks. Each thread communicates with the others using channel-read / channel-write primitives. Thus, the system can be validated efficiently and quickly by software. System 's realization consists of synthesizing hardware tasks to RTL-VHDL language. This step is automated from C task to FPGA mapping. This paper shows the method's effectiveness through the realization of a network controller on FPGA enabling communication between two Linux stations.

Published in:

Rapid System Prototyping, 2004. Proceedings. 15th IEEE International Workshop on

Date of Conference:

28-30 June 2004