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Chip designers transitioning from VLSI to System-on-Chip (SoC) design are experiencing a major increase in design complexity: Project scale, design content and the technical requirements for successful design are all going up concurrently and, in many cases, exponentially. At the same time, business success increasingly requires first-to-market delivery of innovative and competitive new products with rapid ramp to volume production. In many cases, the manufacturing life of individual designs is trending downwards, from many years to (typically) about one year. Conventional design approaches - which evolved over time to address VLSI design requirements - often do not scaleup to address requirements in this era of nanometer SoCs. At a practical level, this may result in multiple silicon iterations to address all of the product requirements correctly, which is likely to jeopardize business success in the present stringent business climate: There is simply not enough time to iterate-to-success and still achieve business goals. These two forces increasing design complexity and reduced manufacturing windows - place a great (and growing) emphasis on achieving first silicon success with high-yielding designs; this is increasingly the key difference between business success and failure for SoC design. The presentation focuses on sharing recent design experience in developing several, industry-first system-on-chip (SoC) ICs, as these relate to improvements in design methods (including design best practices to verify design performance across the manufacturing range), new design technologies, design methodology, and circuit and chip electrical / physical design techniques which contributed to first silicon success. The results enabled successful achievement of business and technical objectives set for the designs. The material may be useful for design engineers and general / technical management interested in the design and development of nanometer system-on-chip ICs.