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Case of via resistance increase during thermal cycle

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2 Author(s)
Drizlikh, S. ; Nat. Semicond. Corp., South Portland, ME, USA ; Francis, T.

We report on a case of via resistance increase after process induced thermal cycles. Evidence of volume expansion at via bottom is shown on cross sections, with complete disconnect between the W plug and ARC TiN in worst case. The problem is traced to interaction between Fluorine implanted into TiN ARC during the oxide overetch step and Ti portion of the via liner. When liner Ti is treated by N2 plasma prior to CVD TiN deposition, the problem is reduced.

Published in:

Advanced Semiconductor Manufacturing, 2004. ASMC '04. IEEE Conference and Workshop

Date of Conference:

4-6 May 2004

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