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Yield learning using the defect reticle method

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2 Author(s)
T. Neyer ; Yield Enhancement Projects PL VI, Infineon Technol., Villach, Austria ; M. Hafner

In this paper we describe a technique called the defect reticle method and illustrate its application to semiconductor manufacture. This technique sheds light on many unknown and so far inaccessible relationships between defect types and yield loss. We discuss an excerpt of results from the first year of application of this method within Infineon.

Published in:

Advanced Semiconductor Manufacturing, 2004. ASMC '04. IEEE Conference and Workshop

Date of Conference:

4-6 May 2004