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Enhanced interleaved multithreaded multiprocessors and their performance analysis

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1 Author(s)
W. M. Zuberek ; Dept. of Comput. Sci., Memorial Univ., St John, Alta., Canada

In interleaved multithreading, the thread changes in each processor cycle, consecutive instructions are issued from different threads, and no data dependencies can stall the pipeline. Enhanced interleaved multithreading maintains a number of additional threads which are used to replace an active thread when it initiates a long-latency operation. Instruction issuing slots, which are lost in pure interleaved multithreading are thus used by instructions from the new thread. The paper studies performance improvements due to enhanced multithreading by analyzing a timed Petri net model of an enhanced multithreaded architecture at the instruction execution level.

Published in:

Application of Concurrency to System Design, 2004. ACSD 2004. Proceedings. Fourth International Conference on

Date of Conference:

16-18 June 2004