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TOBOL-a new methodology for the top-to-bottom level hardware description in VLSI design-automation systems

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1 Author(s)
Chen, C.Y.R. ; Dept. of Electr. & Comput. Eng., Syracuse Univ., NY, USA

The TOBOL methodology for hardware description from top to bottom level is proposed. Multilevel circuit descriptions can efficiently be provided for diversified purposes. Low-level (such as transistor-level) design information can easily be attached into high-level descriptions. TOBOL utilizes consistent data representations at different levels and allows the integration of circuit descriptions at different levels into a single unified system. Therefore, redundant information is greatly reduced, and efficient access of right functional abstractions of circuits is achieved

Published in:

Computer Languages, 1988. Proceedings., International Conference on

Date of Conference:

9-13 Oct 1988

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