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Integration of Simulation and response surface methods for thermal design of multichip modules

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3 Author(s)
Hsien-Chie Cheng ; Inst. of Aeronaut. Eng., Feng Chia Univ., Taichung, Taiwan ; Wen-Hwa Chen ; I-Chun Chung

This paper presents a mathematical expression of the chip junction temperature in terms of chip spatial location and size for effective thermal characterization of ball grid array (BGA) typed multichip modules (MCMs). It is created through the integration of the finite element (FE) analysis and the response surface methods (RSMs) that introduce an approximation of the chip junction temperature in the form of a global response surface. In place of FE simulations, the global response surface is then used to effectively characterize the thermal performance of MCMs, and facilitate the thermal management and the finding of the optimal thermal design of MCMs. To create a set of response data, a rigorous three-dimensional (3D) FE modeling of the MCM package is first established for thermal analysis. The surface loads of the FE model for the heat conduction problems are described by using existing heat transfer (HT) coefficient correlation models. The validity of the proposed FE modeling is substantiated by both the IR thermography-based thermal characterization (IRTTC) approach and the thermal test die measurement based on joint electron device engineering council (JEDEC) specification under a natural convection environment. The uncertainty of the specific power supply applied in the study and the thermal test die measurement is also analyzed. To demonstrate the proposed methodology, two types of MCM thermal design problems are fulfilled, each of which corresponds to a different chip layout. It turns out that the mathematical expression could not only effectively define the relation of the thermal performance and design parameters but also highlight their combinatorial effect.

Published in:

Components and Packaging Technologies, IEEE Transactions on  (Volume:27 ,  Issue: 2 )