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This paper describes a quadrature direct digital frequency synthesizer (QDDFS) architecture based on a new phase-to-sine conversion technique. The proposed technique uses polynomial interpolation and rotational transformation in a fine/coarse approach, achieving high-resolution output with a wide spurious-free dynamic range (SFDR). The QDDFS with this technique requires small-sized lookup tables and a simple computational engine. The fine/coarse decomposition significantly reduces the size of required lookup tables, and the polynomial interpolation enables accurate approximation of cosine and sine values. Two prototype QDDFS ICs were fabricated in 0.35-/spl mu/m CMOS. The final prototype IC produces 16-b cosine and sine outputs with a spectral purity greater than 100-dB. It has a frequency tuning resolution of 0.03-Hz at a 150-MHz sampling rate and consumes 350-mW with a 3.0-V power supply.
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on (Volume:12 , Issue: 7 )
Date of Publication: July 2004