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0.4-V logic-library-friendly SRAM array using rectangular-diffusion cell and delta-boosted-array voltage scheme

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3 Author(s)
Yamaoka, M. ; Central Res. Lab., Hitachi Ltd., Tokyo, Japan ; Osada, K. ; Ishibashi, K.

We designed a logic-library-friendly SRAM array. The array uses rectangular-diffusion cell (RD cell) and delta-boosted-array-voltage scheme (DBA scheme). In the RD cell, the cell ratio is 1.0, and it reduces the imbalance of the cell ratio. A low supply voltage deteriorates the static noise margin, however, the DBA scheme compensates it. Using the combination of RD cell and DBA scheme, a 32-kB test chip achieves 0.4-V operation at 4.5-MHz frequency, 140-μW power dissipation, and 0.9-μA standby current.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:39 ,  Issue: 6 )