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A framework for energy and transient power reduction during behavioral synthesis

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2 Author(s)
Mohanty, S.P. ; Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA ; Ranganathan, N.

In battery driven portable applications, the minimization of energy, average power, peak power, and peak power differential are equally important to improve reliability and efficiency. The peak power and the peak power differential drive the transient characteristics of a CMOS circuit. In this paper, we propose a framework for the simultaneous reduction of energy and transient power during behavioral synthesis. A new metric called "cycle power function" (CPF) is defined which captures the transient power characteristics as an equally weighted sum of the normalized mean cycle power and the normalized mean cycle differential power. Minimizing CPF using multiple supply voltages and dynamic frequency clocking under resource constraints results in the reduction of both energy and transient power. Based on the above, we develop a new datapath scheduling algorithm called CPF-scheduler which attempts at power and energy minimization by minimizing the CPF parameter during the scheduling process. The type and number of functional units available become the set of resource constraints for the scheduler. Experimental results indicate that the proposed scheduler achieves significant reductions in terms of power and energy.

Published in:

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:12 ,  Issue: 6 )

Date of Publication:

June 2004

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