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Logic synthesis for manufacturability

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2 Author(s)
Nardi, Alessandra ; California Univ., Berkeley, CA, USA ; Sangiovanni-Vincentelli, A.L.

Design optimization during synthesis is for area and/or performance while optimization for yield occurs at the layout level. To obtain abstraction level for yield optimization by introducing an interesting approach to yield-driven logic synthesis. Design for manufacturability denotes all techniques designers use to estimate and control yield and robustness during the design phase, prior to manufacturing.

Published in:

Design & Test of Computers, IEEE  (Volume:21 ,  Issue: 3 )