By Topic

Transient power minimization through datapath scheduling in multiple supply voltage environment

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Mohanty, S.P. ; Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA ; Ranganathan, N. ; Chappidi, S.K.

In designs for battery driven portable applications, the reduction of peak power, peak power differential, average power and energy are equally important. In (S. P. Mohanty et al, Proc. of Intl. Conf on VLSI Design, p.539-545, 2003), a parameter called the "cycle power profile function " (CPF) is defined that captures the above power parameters and a heuristic algorithm is proposed using multiple voltages and dynamic clocking for its minimization. In this paper, we redefine the CPF denoted as CPFMC for multiple voltages and multicycling (MVMC). Then, we modify the nonlinear CPFMC to facilitate its minimization using ILP through datapath scheduling. Experiments conducted for various high level synthesis benchmarks reveal significant reductions in all power parameters.

Published in:

Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on  (Volume:1 )

Date of Conference:

14-17 Dec. 2003