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Optimum performance zero crossing digital phase locked loop using multi-sampling technique

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2 Author(s)
Nasir, Q. ; Dept. of EE & Comput. Eng., Univ. of Sharjah, United Arab Emirates ; Al-Araji, S.R.

An optimum-performance Multi-Sampling Zero Crossing Digital Phase Lock Loop ( MS-ZCDPLL) with fast acquisition and wide locking range is presented in this work. While keeping the loop bandwidth fixed, the improved performance is achieved by increasing the Digital Controlled Oscillator (DCO) frequency so that the input is sampled more than once per cycle. ne proposed system was simulated under noise free as well as noisy conditions and shown to have improved acquisition and locking performance over the conventional loop without any system noise degradation.

Published in:

Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on  (Volume:2 )

Date of Conference:

14-17 Dec. 2003