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Practical design assistance at register transfer level using a data path verifier

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4 Author(s)
H. Nakamura ; Inst. of Inf. Sci. & Electron., Tsukuba Univ., Ibaraki ; Y. Kukimoto ; M. Fujita ; H. Tanaka

A practical design assistance system at the register transfer level is proposed. The unique characteristic of this system is that users are allowed to modify a register-level design manually. At first, the designer gives an initial behavioral description and an initial structure of a data path to be designed. The initial structure is formed through the designers' intuition. The final design is obtained by modifying the initial design manually. Consistency between the data path and its behavioral specification is verified automatically. The verifier was implemented and applied to an ASIC chip design

Published in:

Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on

Date of Conference:

17-19 Sep 1990